A single industrial machine — weighing roughly 180 tons and assembled from over 100,000 precision components — may shape the trajectory of global artificial intelligence competition. Built exclusively by the Dutch firm ASML, the Extreme Ultraviolet (EUV) lithography scanner is the only commercially available system capable of mass-producing the world’s most advanced semiconductor chips.
Since 2019, U.S.-led export controls have effectively prevented ASML from selling EUV systems to China.¹ What might appear as a narrow trade restriction is, in reality, a structural constraint. In an era where frontier AI development remains tightly coupled to large-scale computing power, the absence of EUV capability places meaningful limits on how efficiently and how extensively advanced chips can be manufactured domestically.
China’s AI ambitions are extensive and well documented. Beijing has designated artificial intelligence a national strategic priority, mobilizing state capital, industrial policy, and private-sector investment toward technological self-sufficiency.² Yet semiconductor fabrication operates according to physical and engineering constraints that do not bend easily to policy ambition. At the center of that constraint sits EUV lithography.
The Lithography Divide
Modern AI systems depend on advanced logic chips produced at cutting-edge process nodes — 7 nanometers (nm), 5nm, 3nm, and below. Fabricating these nodes efficiently at scale requires EUV lithography, which uses 13.5-nanometer wavelength light to etch transistor features with extraordinary precision.
ASML is currently the sole manufacturer of EUV scanners. Each machine integrates critical subsystems from across Europe, Japan, and the United States, including high-precision mirrors produced by Germany’s Carl Zeiss SMT, whose tolerances are measured in fractions of a nanometer.³ The industrial ecosystem supporting EUV has developed over decades.
Following U.S. pressure beginning in 2018, the Dutch government declined to grant export licenses for EUV systems to China.⁴ Subsequent restrictions have extended to certain advanced Deep Ultraviolet (DUV) tools as well. As of this writing, no Chinese semiconductor manufacturer has access to EUV systems.
The resulting technological gap is substantial, though its exact magnitude is difficult to quantify publicly. Analysts at firms such as TechInsights and SemiAnalysis estimate that China’s leading foundry, Semiconductor Manufacturing International Corporation (SMIC), trails global leaders at the most advanced logic nodes by several years.⁵ Precise comparisons are complicated by definitional differences across nodes and limited transparency regarding yields. Nonetheless, leading-edge mass production remains concentrated outside China.
That distinction matters because semiconductor leadership is not merely about achieving a node once. It is about sustaining high-yield, high-volume, cost-efficient production.
Manufacturing Without EUV
China has demonstrated impressive technical resilience under constraint. In 2023, Huawei’s Mate 60 Pro smartphone contained a 7nm chip believed to have been manufactured by SMIC using complex DUV multi-patterning techniques.⁶ This represented a notable achievement given existing export controls.
But multi-patterning is not equivalent to EUV. It requires multiple exposures to achieve features that EUV can print in a single step. Each additional exposure increases process complexity, raises defect risk, reduces yield, and adds cost.
In advanced memory fabrication — particularly at modern DRAM nodes — EUV has become integral to maintaining global competitiveness.⁷ Chinese memory producers have advanced rapidly, yet independent industry analysis continues to suggest yield and cost disadvantages relative to established leaders.⁸
For logic chips, the issue is scale and efficiency. Producing advanced nodes via DUV multi-patterning is technically possible in limited quantities. Scaling that production to tens of millions of high-yield dies — at competitive cost and power efficiency — is far more challenging.
Public data on China’s exact yields and production volumes is incomplete, particularly given heightened opacity under sanctions. This analysis therefore does not rest on precise numerical estimates. Rather, it rests on structural features of semiconductor physics: EUV simplifies process steps, improves yield potential, and reduces cost per transistor at leading-edge nodes. In its absence, fabrication becomes more complex and typically less efficient.
In commercial markets, sustained yields below approximately 60 percent become economically burdensome. Leading global foundries at stabilized advanced nodes typically operate at materially higher yield rates.⁹ Even modest yield differentials compound when scaled across large volumes.
China can produce advanced chips. The question is whether it can produce them at the scale, efficiency, and cost required to support expansive frontier AI infrastructure.
The Compute Dimension
Modern frontier AI development remains heavily compute-intensive. Large language models and advanced multimodal systems require extensive clusters of high-performance accelerators during training.
Publicly available estimates — though necessarily incomplete — suggest that U.S.-based hyperscalers currently control AI training infrastructure at a scale exceeding that of China’s largest clusters.¹⁰ Exact comparisons are difficult due to stockpiling, sanctions circumvention, and limited transparency. Nonetheless, most independent analysts conclude that a meaningful compute gap exists.
Export controls have further shaped this landscape. Since 2022, the United States has restricted exports of Nvidia’s most advanced AI accelerators to China.¹¹ Domestic alternatives exist — notably Huawei’s Ascend series — but they are generally fabricated on less advanced nodes and face power-efficiency limitations relative to Nvidia’s most recent designs.¹²
Algorithmic efficiency can offset hardware deficits to a degree. China’s AI ecosystem has demonstrated skill in optimizing models for constrained environments. Yet scaling laws in machine learning continue to suggest that, at the frontier, performance improvements correlate with increases in training compute.¹³
This does not imply determinism. AI innovation is multidimensional. Data quality, architecture, talent, and software engineering all matter. But when scaling dynamics remain compute-sensitive, sustained differences in fabrication efficiency and chip volume can influence competitive trajectories.
Adaptation Under Constraint
China is actively pursuing mitigation strategies.
First, it is investing heavily in domestic EUV research. Chinese institutions have explored alternative light-source concepts, including steady-state microbunching approaches.¹⁴ Reports suggest progress in prototype components.¹⁵ Moving from laboratory demonstration to high-volume, production-grade systems, however, remains a substantial engineering challenge.
Second, China is accelerating advanced packaging. Chiplet architectures, 2.5D interposers, and high-bandwidth memory stacking allow multiple smaller dies to be integrated into powerful composite systems.¹⁶ Advanced packaging can partially compensate for lithography limitations by aggregating performance across dies.
But packaging assembles performance; it does not create transistor density. Underlying node efficiency continues to influence power consumption and cost per unit of compute.
Third, China is pursuing algorithm-hardware co-design. Firms such as Huawei and Zhipu AI have trained models on domestic accelerator platforms, optimizing software stacks around available hardware.¹⁷ In a constrained ecosystem, such co-design can yield competitive applications even without absolute leadership in silicon.
Finally, China’s state-directed industrial strategy alters economic incentives. In market-driven systems, fabrication inefficiency constrains scaling. In a sovereignty-driven model, higher costs may be tolerated in pursuit of long-term autonomy.
None of these adaptation pathways should be dismissed.
On Chokepoints and History
Industrial history counsels caution in declaring any technological chokepoint permanent. The British textile advantage eroded. The U.S. nuclear monopoly dissolved. Japanese DRAM dominance faded. Apparent structural ceilings have cracked under sustained pressure before.
The durability of the EUV constraint depends on two variables: whether China develops a viable alternative lithography pathway and whether AI scaling dynamics continue to reward sheer compute concentration.
This analysis assumes that current fabrication pathways remain dominant and that frontier AI continues to benefit materially from scaling compute. A disruptive shift in either would alter the strategic calculus.
What can be said with confidence is narrower: at present, EUV capability meaningfully shapes the efficiency and scale of advanced chip production. Insofar as frontier AI remains compute-intensive, that fabrication gap constitutes a central structural constraint on China’s ability to compete at the leading edge.
That constraint may narrow. It may erode. It may persist longer than expected. But in the current configuration of physics, policy, and supply-chain concentration, it matters.
Conclusion: A Constraint, Not a Verdict
China’s AI ecosystem will continue to innovate. It will produce regionally competitive platforms, pursue efficiency breakthroughs, and invest heavily in domestic semiconductor development. The absence of EUV does not preclude technological advancement.
It does, however, impose cost and efficiency penalties at the frontier of fabrication. Those penalties accumulate when scaled across national AI infrastructure.
The EUV gap should not be understood as destiny. It should be understood as a present structural condition — one that shapes the competitive landscape today, even as its long-term durability remains uncertain.
In the geopolitics of artificial intelligence, algorithms command attention. But fabrication capacity defines the boundaries within which those algorithms scale.
For now, that boundary is etched in silicon.
Notes
- Ana Swanson and Don Clark, “U.S. Presses the Netherlands to Block Chip Exports to China,” New York Times, March 2019.
- State Council of the People’s Republic of China, “Next Generation Artificial Intelligence Development Plan,” 2017.
- ASML Holding N.V., Annual Report 2023.
- Dutch Government, “Expansion of Export Control on Advanced Semiconductor Manufacturing Equipment,” 2023.
- TechInsights, “SMIC 7nm Analysis,” 2023; SemiAnalysis industry reports, 2023–2025.
- Dan Strumpf, “Huawei’s New Phone Shows China’s Chip Breakthrough,” Wall Street Journal, August 2023.
- SK Hynix investor materials, 2023.
- Counterpoint Research, memory industry analysis 2023–2024.
- TSMC investor presentations, 2022–2024.
- Epoch AI, compute infrastructure estimates 2023–2024.
- U.S. Department of Commerce, Bureau of Industry and Security, Export Controls on Advanced Computing, 2022–2023.
- Huawei Ascend technical documentation, 2023.
- Jared Kaplan et al., “Scaling Laws for Neural Language Models,” 2020.
- Tsinghua University research publications on steady-state microbunching EUV sources, 2023–2024.
- South China Morning Post reporting on domestic EUV prototypes, 2024.
- AMD and Intel investor presentations on chiplet architectures, 2022–2024.
- Company disclosures and Chinese technology media reports, 2024–2025.